Concept & Reasoning

DMA controllers contain internal state that must return to a known condition at system initialization. RESET disables/clears operational state so channels and mode registers can be reprogrammed safely. HOLD/HLDA are bus arbitration signals and do not perform this internal register clearing.

How to Solve It in the Exam

Clear internal controller state → RESET.

Important Exam Point

Differentiate reset/init signals from bus request/acknowledge signals.

Quick Trick

Clear internal controller state → RESET.

Common Mistake

Choosing HLDA, which only acknowledges a bus hold request.

Concept & Reasoning

DMA controllers contain internal state that must return to a known condition at system initialization. RESET disables/clears operational state so channels and mode registers can be reprogrammed safely. HOLD/HLDA are bus arbitration signals and do not perform this internal register clearing.

How to Solve It in the Exam

Clear internal controller state → RESET.

Important Exam Point

Differentiate reset/init signals from bus request/acknowledge signals.

Quick Trick

Clear internal controller state → RESET.

Common Mistake

Choosing HLDA, which only acknowledges a bus hold request.

Concept & Reasoning

DMA controllers contain internal state that must return to a known condition at system initialization. RESET disables/clears operational state so channels and mode registers can be reprogrammed safely. HOLD/HLDA are bus arbitration signals and do not perform this internal register clearing.

How to Solve It in the Exam

Clear internal controller state → RESET.

Important Exam Point

Differentiate reset/init signals from bus request/acknowledge signals.

Quick Trick

Clear internal controller state → RESET.

Common Mistake

Choosing HLDA, which only acknowledges a bus hold request.