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EasyDeputy Executive Engineer (Electrical), Class-2, Sports Authority of Gujarat / Assistant Engineer (Electrical), Class-2,2026✓ Editorially verified
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Consider the following statements regarding Memory interfacing in 8051:1.Address decoding is required for memory interfacing.2.Chip select signal is used to enable memory device.3.Multiple devices can share data bus.Which of the above statements is/are correct?

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Answer & Explanation
Correct AnswerB. 1, 2 and 3

Quick Explanation

The classic 8051 is an 8-bit Harvard-style microcontroller with separate code and data spaces. The standard core has 4 KB on-chip program ROM and 128 bytes internal RAM, supports external memory, multiple interrupts and configurable interrupt priority. Key relation: Reset SP=07H; classic internal RAM=128 bytes; standard ROM=4 KB.

Exam focus: Remember 07H for stack pointer reset. Common trap: 00H is not the reset value of the 8051 stack pointer.

Formula / Key Relation

Reset SP=07H; classic internal RAM=128 bytes; standard ROM=4 KB.

Detailed Explanation

Correct Answer: B - 1, 2 and 3 Quick Concept Explanation The classic 8051 is an 8-bit Harvard-style microcontroller with separate code and data spaces. The standard core has 4 KB on-chip program ROM and 128 bytes internal RAM, supports external memory, multiple interrupts and configurable interrupt priority. Key relation: Reset SP=07H; classic internal RAM=128 bytes; standard ROM=4 KB.Exam focus: Remember 07H for stack pointer reset. Common trap: 00H is not the reset value of the 8051 stack pointer. Statement-wise Verification Statement 1 - Correct.Address decoding is required for memory interfacing.The standard core has 4 KB on-chip program ROM and…

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